Description: 刚刚学习CPLD的绝对有用，这是由altera公司MAX7000s系列组成的最小系统，CPLD为EPM7064，封装PLCC，绝对完整，包括原理图和PCB图，板子已经调试成功，注意用protel DXP打开，特别适合于CPLD初学者。-just learning CPLD absolutely useful, This is the company MAX7000s altera series consisting of the smallest system, CPLD for the EPM7064, Packaging, PLCC, absolute integrity, including schematic and PCB map Debugging plank has been successful, Protel DXP attention to the use of open, and are particularly suited to beginners CPLD. Platform: |
Size: 83968 |
Author:yulei |
Hits:
Description: 针对CPLD的所有应用，使自己花了好长时间才整理出来，分类-CPLD for all applications, so that spent their time before finishing well out of classification Platform: |
Size: 16572416 |
Author:阚建峰 |
Hits:
Description: 此程序为出租车计价器，配合凌阳61板和液晶模组可模仿出租车计价器，并可对其公里、价格自己进行设定-This procedure Taximeter with Sunplus 61 panels and LCD modules Taximeter replicable, and its kilometers, set their own prices Platform: |
Size: 11177984 |
Author:wendy |
Hits:
Description: CPLD EPM7256原理图PCB图，已经校验，没有什么问题，制版既可。-CPLD EPM7256 Schematic diagram PCB have been checking, there was no problem with either plate. Platform: |
Size: 49152 |
Author:马爽 |
Hits:
Description: cpld ep240硬件开发图纸文档,为CPLD开发提供平台-hardware development cpld ep240 drawings documents, provide a platform for CPLD Development Platform: |
Size: 60416 |
Author: |
Hits:
Description: altera公司cpld/fpga开发软件quartus2中文使用教程-altera company cpld/fpga development of software to use Chinese quartus2 Guide Platform: |
Size: 3098624 |
Author:郑洪波 |
Hits:
Description: CPLD开发板VHDL源程序并附上开发板的原理图-CPLD development board VHDL source code along with the development board schematics Platform: |
Size: 4709376 |
Author:liaoyintang |
Hits:
Description: CPLD入门知识，老师的课件！希望可以对大家有所帮助。-CPLD Starter knowledge, the teacher s courseware! I hope we can be helpful. Platform: |
Size: 1068032 |
Author:翟进乾 |
Hits:
Description: 一个ALTERA公司EPM1270 cpld的实验板原理图，其中有PCI接口电路，PDF格式-A ALTERA Corporation EPM1270 cpld schematic diagram of the experimental board, including PCI interface circuit, PDF format Platform: |
Size: 240640 |
Author:blur |
Hits:
Description: 基于C P L D 的伪随机序列发生器，用FPGA产生随机序列的-CPLD-based pseudo-random sequence generator, generate random sequences using FPGA Platform: |
Size: 248832 |
Author:jackk |
Hits:
Description: 这是ATLREA的EPM570的一个144管脚CPLD的最小系统图，对于设计CPLD的板子有作用-This is the EPM570 ATLREA a minimum of 144 pin CPLD system diagram, for the design of the board has the role of CPLD Platform: |
Size: 340992 |
Author:yuanzengquan |
Hits:
Description: 设计一个正弦信号发生器，使用凌阳公司的16位单片机SPCE061A作为中央控制器，结合DDS芯片AD9850，产生0～15MHz频率可调的正弦信号,正弦信号频率设定值可断电保存；使用宽频放大技术，在50Ω负载电阻上使1K～10MHz范围内的正弦信号输出电压幅度VP-P=6V±1V；产生载波频率可设定的FM和AM信号；调制信号为1KHz的正弦波，调制信号的产生采用DDS技术，由CPLD和Flash ROM加上DAC进行直接数字合成；二进制基带序列码由CPLD产生，在100KHz固定载波频率下进行数字键控，产生ASK，PSK信号。-Design of a sinusoidal signal generator, the use of Sunplus 16-bit MCU SPCE061A as the central controller, combined with DDS chip AD9850, have adjustable frequencies 0 ~ 15MHz sinusoidal signal, sinusoidal signal frequency settings can be stored power using broadband amplification, in a 50Ω load resistor to 1K ~ 10MHz sinusoidal signal within the output voltage amplitude VP-P = 6V ± 1V generating the carrier frequency of the FM and AM can be set signal 1KHz sine wave modulation signal, modulated signal generation using DDS technology, coupled by the CPLD and Flash ROM DAC for direct digital synthesis binary baseband sequence code generated by the CPLD in a fixed carrier frequency 100KHz digital keying, resulting in ASK, PSK signals. Platform: |
Size: 29696 |
Author:王金 |
Hits:
Description: 介绍一种嵌入式数字图象处理平台的实现方案, 通过 A R M和C P L D 技术，构造一个具有
通用性、可扩充性、灵活的数字图像处理平台作为嵌入式机器人控制系统的一个子系统-Introduction of an embedded platform for the realization of digital image processing program, through the ARM and CPLD technology, to construct a versatile, scalable and flexible platform for digital image processing embedded robot control system as a subsystem Platform: |
Size: 1553408 |
Author:LQH |
Hits:
Search - CPLD P